173 search results - page 24 / 35 » Domain Reduction for the Circuit Constraint |
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
DAC
2009
ACM
14 years 2 months ago
2009
ACM
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
ISLPED
2003
ACM
14 years 19 days ago
2003
ACM
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
MMAS
2010
Springer
13 years 2 months ago
2010
Springer
We present a formal procedure for structure-preserving model reduction of linear second-order and Hamiltonian control problems that appear in a variety of physical contexts, e.g., ...
TCAD
2010
13 years 2 months ago
2010
Abstract--In sub-100 nm CMOS processes, delay and leakage power reduction continue to be among the most critical design concerns. We propose to exploit the recent availability of f...