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» Dynamic Epistemic Temporal Logic
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ICCAD
2004
IEEE
125views Hardware» more  ICCAD 2004»
14 years 4 months ago
Temporal floorplanning using the T-tree formulation
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang
DAC
2006
ACM
14 years 8 months ago
NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture
Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet m...
Wei Zhang, Niraj K. Jha, Li Shang
ASPDAC
2004
ACM
120views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Temporal floorplanning using 3D-subTCG
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we use a novel topo...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang, Hsin-...
CONCUR
2006
Springer
13 years 9 months ago
Model Checking Quantified Computation Tree Logic
Propositional temporal logic is not suitable for expressing properties on the evolution of dynamically allocated entities over time. In particular, it is not possible to trace such...
Arend Rensink
FM
2009
Springer
154views Formal Methods» more  FM 2009»
13 years 5 months ago
Specification and Verification of Web Applications in Rewriting Logic
Abstract. This paper presents a Rewriting Logic framework that formalizes the interactions between Web servers and Web browsers through icating protocol abstracting HTTP. The propo...
María Alpuente, Demis Ballis, Daniel Romero