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» Dynamic Flip-Flop with Improved Power
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ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
14 years 2 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
VLSID
2003
IEEE
134views VLSI» more  VLSID 2003»
14 years 8 months ago
A Framework for Energy and Transient Power Reduction during Behavioral Synthesis
Abstract-- In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability ...
Saraju P. Mohanty, N. Ranganathan
ASPLOS
2012
ACM
12 years 3 months ago
Chameleon: operating system support for dynamic processors
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...
Sankaralingam Panneerselvam, Michael M. Swift
ISLPED
2004
ACM
123views Hardware» more  ISLPED 2004»
14 years 29 days ago
Improved clock-gating through transparent pipelining
This paper re-examines the well established clocking principles of pipelines. It is observed that clock gating techniques that have long been assumed optimal in reality produce a ...
Hans M. Jacobson
IPPS
2010
IEEE
13 years 5 months ago
Profitability-based power allocation for speculative multithreaded systems
With the shrinking of transistors continuing to follow Moore's Law and the non-scalability of conventional outof-order processors, multi-core systems are becoming the design ...
Polychronis Xekalakis, Nikolas Ioannou, Salman Kha...