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HPCA
2003
IEEE
14 years 8 months ago
Power-Aware Control Speculation through Selective Throttling
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
Juan L. Aragón, José González...
ISLPED
2010
ACM
169views Hardware» more  ISLPED 2010»
13 years 8 months ago
TurboTag: lookup filtering to reduce coherence directory power
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
Pejman Lotfi-Kamran, Michael Ferdman, Daniel Crisa...
PAAMS
2010
Springer
14 years 15 days ago
Advantages of MAS for the Resolution of a Power Management Problem in Smart Homes
Abstract This paper contributes to the design of intelligent buildings. A MultiAgents Home Automation System (MAHAS) is proposed which controls appliances and energy sources in bui...
Shadi Abras, Sylvie Pesty, Stéphane Ploix, ...
HPCA
2005
IEEE
14 years 1 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
MICRO
2003
IEEE
106views Hardware» more  MICRO 2003»
14 years 1 months ago
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, P...