This article describes a standard cell based novel implementation of a low-power Viterbi Decoder (VD) targeted for the IEEE 802.11a Wireless LAN system. Multiple clock rates have ...
Koushik Maharatna, Alfonso Troya, Milos Krstic, Ec...
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
The market demand for portable multimedia applications has exploded in the recent years. Unfortunately, for such applications current compilers and software optimization methods o...
Armita Peymandoust, Tajana Simunic, Giovanni De Mi...
This paper presents an energy-conservation method for multiple disks and their cache memory. Our method periodically resizes the cache memory and controls the rotation speeds unde...
Designing memory controllers for complex real-time and highperformance multi-processor systems-on-chip is challenging, since sufficient capacity and (real-time) performance must b...