473 search results - page 75 / 95 » Dynamic Memory Design for Low Data-Retention Power |
ASPDAC
2006
ACM
14 years 2 months ago
2006
ACM
: With technology scaling, elevated temperatures caused by increased power density create a critical bottleneck modulating the circuit operation. With the advent of FinFET technolo...
GLVLSI
2005
IEEE
14 years 2 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
The advent of multicores has introduced new challenges for programmers to provide increased performance and software reliability. There has been significant interest in technique...
MICRO
2002
IEEE
14 years 1 months ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...