We present an equation-based transistor size optimizer that minimizes delay of custom circuits. Our method uses static timing analysis to find the critical paths and numerical met...
Xiao Yan Yu, Vojin G. Oklobdzija, William W. Walke...
- This paper presents an optimal algorithm for solving the problem of simultaneous fanout optimization and routing tree construction for an ordered set of critical sinks. The algor...
In this paper we present a method for FPGA datapath precision optimization subject to user-defined area and error constraints. This work builds upon our previous research [1] which...
The growing class of portable systems, such as personal computing and communication devices, has resulted in a new set of system design requirements, mainly characterized by domin...
Inki Hong, Darko Kirovski, Gang Qu, Miodrag Potkon...
Practical applications that employ entropy coding for large alphabets often partition the alphabet set into two or more layers and encode each symbol by using some suitable prefix...
Dan Chen, Yi-Jen Chiang, Nasir D. Memon, Xiaolin W...