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» Dynamic Power Management Using Data Buffers
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DATE
2008
IEEE
106views Hardware» more  DATE 2008»
14 years 2 months ago
Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction
We present Low Power Illinois scan architecture (LPILS) to achieve power dissipation and test data volume reduction, simultaneously. By using the proposed scan architecture, dynam...
Anshuman Chandra, Felix Ng, Rohit Kapur
TVLSI
2008
139views more  TVLSI 2008»
13 years 7 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
14 years 2 months ago
A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management
An energy efficient object recognition processor is proposed for real-time visual applications. Its energy efficiency is improved by lowering average power consumption while susta...
Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim...
VLDB
2005
ACM
159views Database» more  VLDB 2005»
14 years 1 months ago
Temporal Management of RFID Data
RFID technology can be used to significantly improve the efficiency of business processes by providing the capability of automatic identification and data capture. This technol...
Fusheng Wang, Peiya Liu
CODES
2001
IEEE
13 years 11 months ago
Dynamic I/O power management for hard real-time systems
Power consumption is an important design parameter for embedded and portable systems. Software-controlled (or dynamic) power management (DPM) has recently emerged as an attractive...
Vishnu Swaminathan, Krishnendu Chakrabarty, S. Sit...