329 search results - page 59 / 66 » Dynamic techniques to reduce memory traffic in embedded syst... |
ICCD
2008
IEEE
14 years 1 months ago
2008
IEEE
— We developed an SMT processor that allows a static WCET analysis of several hard real-time threads and uses the remaining resources for soft or non real-time threads. The analy...
CASES
2001
ACM
13 years 11 months ago
2001
ACM
Abstract. Existing variable-length instruction formats provide higher code densities than fixed-length formats, but are ill-suited to pipelined or parallel instruction fetch and de...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
ECRTS
2005
IEEE
14 years 1 months ago
2005
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
LCTRTS
2005
Springer
14 years 29 days ago
2005
Springer
Real-time garbage collection has been shown to be feasible, but for programs with high allocation rates, the utilization achievable is not sufficient for some systems. Since a hi...