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ICCAD
1993
IEEE
101views Hardware» more  ICCAD 1993»
14 years 18 days ago
Convexity-based algorithms for design centering
A new technique for design centering, and for polytope approximation of the feasible region for a design are presented. In the rst phase, the feasible region is approximated by a ...
Sachin S. Sapatnekar, Pravin M. Vaidya, Steve M. K...
FPL
2001
Springer
123views Hardware» more  FPL 2001»
14 years 29 days ago
Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines
This paper presents new achievements on the automatic mapping of algorithms, written in imperative software programming languages, to custom computing machines. The reconfigurable ...
João M. P. Cardoso, Horácio C. Neto
DATE
2006
IEEE
195views Hardware» more  DATE 2006»
14 years 2 months ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
ICCAD
2003
IEEE
205views Hardware» more  ICCAD 2003»
14 years 1 months ago
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
Aseem Agarwal, David Blaauw, Vladimir Zolotov
RSP
2003
IEEE
149views Control Systems» more  RSP 2003»
14 years 1 months ago
Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cav...