A new technique for design centering, and for polytope approximation of the feasible region for a design are presented. In the rst phase, the feasible region is approximated by a ...
Sachin S. Sapatnekar, Pravin M. Vaidya, Steve M. K...
This paper presents new achievements on the automatic mapping of algorithms, written in imperative software programming languages, to custom computing machines. The reconfigurable ...
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cav...