333 search results - page 4 / 67 » EXACT: algorithm and hardware architecture for an improved A... |
ISJGP
2010
13 years 5 months ago
2010
A variety of modern technologies such as networks, Internet, and electronic services demand private and secure communications for a great number of everyday transactions. Security ...
FCCM
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a hardware-optimized variant of the well-known Gaussian elimination over GF(2) and its highly efficient implementation. The proposed hardware architecture, we...
DAC
1998
ACM
14 years 9 months ago
1998
ACM
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
DAC
1999
ACM
14 years 9 months ago
1999
ACM
Finding the minimum column multiplicity for a bound set of variables is an important problem in Curtis decomposition. To investigate this problem, we compared two graphcoloring pr...
SPAA
2010
ACM
14 years 1 months ago
2010
ACM
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...