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ICISC
2009
132views Cryptology» more  ICISC 2009»
13 years 5 months ago
Side-Channel Analysis of Cryptographic Software via Early-Terminating Multiplications
Abstract. The design of embedded processors demands a careful tradeoff between many conflicting objectives such as performance, silicon area and power consumption. Finding such a t...
Johann Großschädl, Elisabeth Oswald, Da...
TC
2002
13 years 7 months ago
On Transaction Processing with Partial Validation and Timestamp Ordering in Mobile Broadcast Environments
Conventional concurrency control protocols are inapplicable in mobile broadcast environments due to a number of constraints of wireless communications. Previous studies are focuse...
Victor C. S. Lee, Kwok-Wa Lam, Sang Hyuk Son, Eddi...
ASAP
2007
IEEE
175views Hardware» more  ASAP 2007»
13 years 9 months ago
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur S...
ISLPED
2003
ACM
87views Hardware» more  ISLPED 2003»
14 years 27 days ago
On load latency in low-power caches
Many of the recently proposed techniques to reduce power consumption in caches introduce an additional level of nondeterminism in cache access latency. Due to this additional late...
Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Ir...
CODES
2008
IEEE
13 years 9 months ago
A performance-oriented hardware/software partitioning for datapath applications
This article proposes a hardware/software partitioning method targeted to performance-constrained systems for datapath applications. Exploiting a platform based design, a Timed Pe...
Laura Frigerio, Fabio Salice