103 search results - page 16 / 21 » Effect of increasing chip density on the evolution of comput... |
ISCA
2006
IEEE
13 years 7 months ago
2006
IEEE
Power density continues to increase exponentially with each new technology generation, posing a major challenge for thermal management in modern processors. Much past work has exa...
PPOPP
2010
ACM
14 years 4 months ago
2010
ACM
Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also r...
ICCSA
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. In this work, we develop novel file system, FRASH, for byteaddressable NVRAM (FRAM[1]) and NAND Flash device. Byte addressable NVRAM and NAND Flash is typified by the DRA...
DAC
2012
ACM
11 years 10 months ago
2012
ACM
In this paper, we propose two methods used in 3D IC placement that effectively exploit the die-to-die thermal coupling in the stack. First, TSVs are spread on each die to reduce t...
NOCS
2010
IEEE
13 years 6 months ago
2010
IEEE
—Three-dimensional network-on-chip (3D NoC), the combination of NoC and die-stacking 3D IC technology, is motivated to achieve lower latency, lower power consumption, and higher ...