19 search results - page 2 / 4 » Effective Error Diagnosis for RTL Designs in HDLs |
DATE
2009
IEEE
14 years 1 months ago
2009
IEEE
Abstract—The generation of device drivers is a very time consuming and error prone activity. All the strategies proposed up to now to simplify this operation require a manual, ev...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Multiple asynchronous clock domains have been increasingly employed in System-on-Chip (SoC) designs for different I/O interfaces. Functional validation is one of the most expensiv...
GLVLSI
2008
IEEE
13 years 7 months ago
2008
IEEE
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
DAC
2010
ACM
13 years 10 months ago
2010
ACM
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
AUTOMATICA
2007
13 years 7 months ago
2007
The problem of sensor fault diagnosis in the class of nonlinear Lipschitz systems is considered. A dynamic observer structure is used with the objective to make the residual conve...