Sciweavers

32 search results - page 5 / 7
» Effects of Removing Overlapping Solutions on the Performance...
Sort
View
ICCD
2008
IEEE
142views Hardware» more  ICCD 2008»
14 years 1 months ago
Gate planning during placement for gated clock network
Abstract— Clock gating is a popular technique for reducing power dissipation in clock network. Although there have been numerous research efforts on clock gating, the previous ap...
Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu
CASES
2007
ACM
13 years 11 months ago
Non-transparent debugging for software-pipelined loops
This paper tackles the problem of providing correct information about program variable values in a software-pipelined loop through a non-transparent debugging approach. Since mode...
Hugo Venturini, Frédéric Riss, Jean-...
IWMM
2009
Springer
152views Hardware» more  IWMM 2009»
14 years 2 months ago
A new approach to parallelising tracing algorithms
Tracing algorithms visit reachable nodes in a graph and are central to activities such as garbage collection, marshalling etc. Traditional sequential algorithms use a worklist, re...
Cosmin E. Oancea, Alan Mycroft, Stephen M. Watt
TCAD
2008
118views more  TCAD 2008»
13 years 7 months ago
CHIPS: Custom Hardware Instruction Processor Synthesis
This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critica...
Kubilay Atasu, Can C. Özturan, Günhan D&...
CLEF
2007
Springer
14 years 1 months ago
Stemming Approaches for East European Languages
In our participation in this CLEF evaluation campaign, the first objective is to propose and evaluate various indexing and search strategies for the Czech language in order to hop...
Ljiljana Dolamic, Jacques Savoy