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» Efficient Algorithms for Minimizing Cross Validation Error
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ICCAD
1999
IEEE
86views Hardware» more  ICCAD 1999»
13 years 11 months ago
Clock skew scheduling for improved reliability via quadratic programming
This paper considers the problem of determining an optimal clock skew schedule for a synchronous VLSI circuit. A novel formulation of clock skew scheduling as a constrained quadrat...
Ivan S. Kourtev, Eby G. Friedman
BMCBI
2011
13 years 2 months ago
Flexible taxonomic assignment of ambiguous sequencing reads
Background: To characterize the diversity of bacterial populations in metagenomic studies, sequencing reads need to be accurately assigned to taxonomic units in a given reference ...
José Carlos Clemente, Jesper Jansson, Gabri...
CORR
2008
Springer
147views Education» more  CORR 2008»
13 years 7 months ago
Impact of CSI on Distributed Space-Time Coding in Wireless Relay Networks
We consider a two-hop wireless network where a transmitter communicates with a receiver via M relays with an amplify-and-forward (AF) protocol. Recent works have shown that sophis...
Mari Kobayashi, Xavier Mestre
SIGMOD
2003
ACM
145views Database» more  SIGMOD 2003»
14 years 7 months ago
Evaluating Probabilistic Queries over Imprecise Data
Many applications employ sensors for monitoring entities such as temperature and wind speed. A centralized database tracks these entities to enable query processing. Due to contin...
Reynold Cheng, Dmitri V. Kalashnikov, Sunil Prabha...
CODES
2005
IEEE
14 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...