Sciweavers

303 search results - page 29 / 61
» Efficient Design Error Correction of Digital Circuits
Sort
View
DAC
2003
ACM
14 years 2 months ago
4G terminals: how are we going to design them?
Fourth-generation wireless communication systems (4G) will have totally different requirements than what front-end designers have been coping with up to now. Designs must be targe...
Jan Craninckx, Stéphane Donnay
DAC
2004
ACM
14 years 9 months ago
Synthesizing interconnect-efficient low density parity check codes
Error correcting codes are widely used in communication and storage applications. Codec complexity has usually been measured with a software implementation in mind. A recent hardw...
Marghoob Mohiyuddin, Amit Prakash, Adnan Aziz, Way...
GLVLSI
2007
IEEE
111views VLSI» more  GLVLSI 2007»
14 years 3 months ago
Probabilistic gate-level power estimation using a novel waveform set method
A probabilistic power estimation technique for combinational circuits is presented. A novel set of simple waveforms is the kernel of this technique. The transition density of each...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Ein...
FPGA
2006
ACM
195views FPGA» more  FPGA 2006»
14 years 12 days ago
An adaptive Reed-Solomon errors-and-erasures decoder
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Rus...
DATE
2007
IEEE
80views Hardware» more  DATE 2007»
14 years 3 months ago
Engineering trust with semantic guardians
The ability to guarantee the functional correctness of digital integrated circuits and, in particular, complex microprocessors, is a key task in the production of secure and trust...
Ilya Wagner, Valeria Bertacco