286 search results - page 15 / 58 » Efficient Hardware Architectures for Modular Multiplication ... |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents an RSA hardware design that simultaneously achieves high-performance and lowpower. A bit-oriented, split modular multiplication algorithm and architecture are ...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
- Parallel architectures have become an increasingly popular method in which to achieve high performance with low power consumption. In order to leverage these benefits, applicatio...
ISCAS
2002
IEEE
14 years 14 days ago
2002
IEEE
FPGAs are an attractive platform for elliptic curve cryptography hardware. Since field multiplication is the most critical operation in elliptic curve cryptography, we have studi...
AHS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
ARITH
2007
IEEE
14 years 1 months ago
2007
IEEE
We describe a new method to perform the modular exponentiation operation, i.e., the computation of c = me mod n, where c, m, e and n are large integers. The new method uses the di...