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WAIFI
2010
Springer
160views Mathematics» more  WAIFI 2010»
13 years 11 months ago
Speeding Up Bipartite Modular Multiplication
Abstract. A large set of moduli, for which the speed of bipartite modular multiplication considerably increases, is proposed in this work. By considering state of the art attacks o...
Miroslav Knezevic, Frederik Vercauteren, Ingrid Ve...
PARELEC
2000
IEEE
13 years 12 months ago
Implementation of an Adaptive Reconfigurable Group Organized (ARGO) Parallel Architecture
The purpose of this paper is to demonstrate the implementation of an adaptable parallel architecture capable of system to task adaptation. The system implementation was based on X...
Lucas Szajek, Lev Kirischian
VLSISP
2011
358views Database» more  VLSISP 2011»
13 years 2 months ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
FPGA
2000
ACM
141views FPGA» more  FPGA 2000»
13 years 11 months ago
Tolerating operational faults in cluster-based FPGAs
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
Vijay Lakamraju, Russell Tessier
ASAP
2010
IEEE
193views Hardware» more  ASAP 2010»
13 years 9 months ago
Automatic generation of polynomial-based hardware architectures for function evaluation
Abstract--Polynomial approximation is a very general technique for the evaluation of a wide class of numerical functions of one variable. This article details an architecture gener...
Florent de Dinechin, Mioara Joldes, Bogdan Pasca