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FPL
2004
Springer
93views Hardware» more  FPL 2004»
14 years 27 days ago
Second Order Function Approximation Using a Single Multiplication on FPGAs
Abstract. This paper presents a new scheme for the hardware evaluation of elementary functions, based on a piecewise second order minimax approximation. The novelty is that this ev...
Jérémie Detrey, Florent de Dinechin
ASAP
2008
IEEE
96views Hardware» more  ASAP 2008»
14 years 2 months ago
Integer and floating-point constant multipliers for FPGAs
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimi...
Nicolas Brisebarre, Florent de Dinechin, Jean-Mich...
DATE
2004
IEEE
131views Hardware» more  DATE 2004»
13 years 11 months ago
Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures
The increasing complexity of system-on-chip (SOC) integrated circuits has spurred the development of versatile automatic test equipment (ATE) that can simultaneously drive differe...
Anuja Sehgal, Krishnendu Chakrabarty
FCCM
2004
IEEE
133views VLSI» more  FCCM 2004»
13 years 11 months ago
A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
Zachary K. Baker, Viktor K. Prasanna
ISCA
2006
IEEE
123views Hardware» more  ISCA 2006»
13 years 7 months ago
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...