Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
: In this paper we study Complex Read Faults in SRAMs, a combination of various malfunctions that affect the read operation in nanoscale memories. All the memory elements involved ...
This paper proposes debug patterns combined with an intuitive flow to accelerate and simplify the debugging of SystemC designs. A debug pattern provides a formalized procedure to f...
Frank Rogin, Erhard Fehlauer, Christian Haufe, Seb...
The paper addresses software implementation of large sparse systems of Boolean functions. Fast evaluation of such functions with the smallest memory consumption is often required ...
—This paper presents an energy-efficient turbo decoder based on border metric encoding, which is especially suitable for non-binary circular turbo codes. In the proposed method, ...