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140
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ASPDAC
2007
ACM
105views Hardware» more  ASPDAC 2007»
15 years 8 months ago
An Efficient Computation of Statistically Critical Sequential Paths Under Retiming
Abstract-- In this paper we present the Statistical Retimingbased Timing Analysis (SRTA) algorithm. The goal is to compute the timing slack distribution for the nodes in the timing...
Mongkol Ekpanyapong, Xin Zhao, Sung Kyu Lim
142
Voted
DATE
2007
IEEE
94views Hardware» more  DATE 2007»
15 years 8 months ago
Optimization-based wideband basis functions for efficient interconnect extraction
This paper introduces a technique for the numerical generation of basis functions that are capable of parameterizing the frequency-variant nature of cross-sectional conductor curre...
Xin Hu, Tarek Moselhy, Jacob K. White, Luca Daniel
112
Voted
ATS
2004
IEEE
108views Hardware» more  ATS 2004»
15 years 8 months ago
Rapid and Energy-Efficient Testing for Embedded Cores
Conventional serial connection of internal scan chains brings the power and time penalty. A novel parallel core wrapper design (pCWD) approach is presented in this paper for reduc...
Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman ...
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
15 years 8 months ago
Context-Aware Performance Analysis for Efficient Embedded System Design
Performance analysis has many advantages in theory compared to simulation for the validation of complex embedded systems, but is rarely used in practice. To make analysis more att...
Marek Jersak, Rafik Henia, Rolf Ernst
DATE
2004
IEEE
131views Hardware» more  DATE 2004»
15 years 8 months ago
Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures
The increasing complexity of system-on-chip (SOC) integrated circuits has spurred the development of versatile automatic test equipment (ATE) that can simultaneously drive differe...
Anuja Sehgal, Krishnendu Chakrabarty