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DATE
1999
IEEE
113views Hardware» more  DATE 1999»
15 years 9 months ago
Cycle-based Simulation with Decision Diagrams
This paper addresses the problem of efficient functional simulation of synchronous digital systems. A technique based on the use of Decision Diagrams (DD) for representing the fun...
Raimund Ubar, Jaan Raik, Adam Morawiec
TC
2010
14 years 11 months ago
Speculatively Redundant Continued Logarithm Representation
Continued logarithms, as originally introduced by Gosper, represent a means for exact rational arithmetic, but their application to exact real arithmetic is limited by the uniquene...
Tomas Brabec
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
15 years 9 months ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...
ASAP
2007
IEEE
118views Hardware» more  ASAP 2007»
15 years 6 months ago
Evaluation of a Tightly Coupled ASIP / Co-Processor Architecture Used in GNSS Receivers
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
Götz Kappen, S. el Bahri, O. Priebe, Tobias G...
ICCD
2007
IEEE
109views Hardware» more  ICCD 2007»
15 years 8 months ago
Improving cache efficiency via resizing + remapping
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
Subramanian Ramaswamy, Sudhakar Yalamanchili