40 search results - page 7 / 8 » Efficient Mapping of Hardware Tasks on Reconfigurable Comput... |
CF
2006
ACM
13 years 10 months ago
2006
ACM
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
EUROPAR
2008
Springer
13 years 8 months ago
2008
Springer
Performance of distributed applications largely depends on the mapping of their components on the underlying architecture. On one mponent-based approaches provide an abstraction su...
FPL
2004
Springer
14 years 11 days ago
2004
Springer
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run -time reconfigurabil...
MICRO
2000
IEEE
13 years 6 months ago
2000
IEEE
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...