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HPCA
2008
IEEE
14 years 7 months ago
Supporting highly-decoupled thread-level redundancy for parallel programs
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
M. Wasiur Rashid, Michael C. Huang
ESCIENCE
2007
IEEE
14 years 1 months ago
Towards a Grid-Enabled Simulation Framework for Nano-CMOS Electronics
The electronics design industry is facing major challenges as transistors continue to decrease in size. The next generation of devices will be so small that the position of indivi...
Liangxiu Han, Asen Asenov, Dave Berry, Campbell Mi...
CODES
2005
IEEE
14 years 1 months ago
Blue matter on blue gene/L: massively parallel computation for biomolecular simulation
This paper provides an overview of the Blue Matter application development effort within the Blue Gene project that supports our scientific simulation efforts in the areas of pro...
Robert S. Germain, Blake G. Fitch, Aleksandr Raysh...
DATE
1998
IEEE
116views Hardware» more  DATE 1998»
13 years 11 months ago
VLSI Architecture for Lossless Compression of Medical Images Using the Discrete Wavelet Transform
This paper presents a VLSI Architecture to implement the forward and inverse 2-D Discrete Wavelet Transform (FDWT/IDWT), to compress medical images for storage and retrieval. Loss...
Isidoro Urriza, José I. Artigas, José...
SAMOS
2009
Springer
14 years 2 months ago
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture
We believe that future many-core architectures should support a simple and scalable way to execute many threads that are generated by parallel programs. A good candidate to impleme...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic