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» Efficient Testing of Forecasts
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IESS
2007
Springer
110views Hardware» more  IESS 2007»
14 years 4 months ago
Run-Time efficient Feasibility Analysis of Uni-Processor Systems with Static Priorities
: The performance of feasibility tests is crucial in many applications. When using feasibility tests online only a limited amount of analysis time is available. Run-time efficiency...
Karsten Albers, Frank Bodmann, Frank Slomka
TVLSI
2008
89views more  TVLSI 2008»
13 years 9 months ago
Test Set Development for Cache Memory in Modern Microprocessors
Up to 53% of the time spent on testing current Intel microprocessors is needed to test on-chip caches, due to the high complexity of memory tests and to the large amount of transis...
Zaid Al-Ars, Said Hamdioui, Georgi Gaydadjiev, Sta...
DSD
2005
IEEE
106views Hardware» more  DSD 2005»
14 years 3 months ago
Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment
1 This paper presents a method for power-constrained system-on-chip test scheduling in an abort-on-first-fail environment where the test is terminated as soon as a fault is detecte...
Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
DATE
1999
IEEE
102views Hardware» more  DATE 1999»
14 years 2 months ago
Minimal Length Diagnostic Tests for Analog Circuits using Test History
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
Alfred V. Gomes, Abhijit Chatterjee
DELTA
2008
IEEE
14 years 4 months ago
AES-Based BIST: Self-Test, Test Pattern Generation and Signature Analysis
Re-using embedded resources for implementing builtin self test mechanisms allows test cost reduction. In this paper we demonstrate how to implement costefficient built-in self tes...
M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre