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HPCA
2007
IEEE
14 years 1 months ago
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
Liqun Cheng, John B. Carter, Donglai Dai
DAC
2006
ACM
13 years 9 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
SIGMOD
2007
ACM
179views Database» more  SIGMOD 2007»
14 years 7 months ago
How to barter bits for chronons: compression and bandwidth trade offs for database scans
Two trends are converging to make the CPU cost of a table scan a more important component of database performance. First, table scans are becoming a larger fraction of the query p...
Allison L. Holloway, Vijayshankar Raman, Garret Sw...
HPCA
2009
IEEE
14 years 8 months ago
Adaptive Spill-Receive for robust high-performance caching in CMPs
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
Moinuddin K. Qureshi
VISUALIZATION
1996
IEEE
13 years 11 months ago
Hierarchical and Parallelizable Direct Volume Rendering for Irregular and Multiple Grids
A general volume rendering technique is described that efficiently produces images of excellent quality from data defined over irregular grids having a wide variety of formats. Re...
Jane Wilhelms, Allen Van Gelder, Paul Tarantino, J...