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» Efficient memory simulation in SimICS
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PATMOS
2005
Springer
14 years 1 months ago
Efficient Simulation of Power/Ground Networks with Package and Vias
As the number of metal layers and the frequency of VLSI continue to increase, the voltage droop on both the package and vias is becoming more pronounced. This paper analyzes the nu...
Jin Shi, Yici Cai, Xianlong Hong, Sheldon X.-D. Ta...
ICMCS
2006
IEEE
102views Multimedia» more  ICMCS 2006»
14 years 1 months ago
An Efficient Memory Construction Scheme for an Arbitrary Side Growing Huffman Table
By grouping the common prefix of a Huffman tree, in stead of the commonly used single-side rowing Huffman tree (SGHtree), we construct a memory efficient Huffman table on the ba...
Sung-Wen Wang, Shang-Chih Chuang, Chih-Chieh Hsiao...
HPCA
2003
IEEE
14 years 8 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...
ICCAD
2008
IEEE
246views Hardware» more  ICCAD 2008»
14 years 4 months ago
MC-Sim: an efficient simulation tool for MPSoC designs
The ability to integrate diverse components such as processor cores, memories, custom hardware blocks and complex network-on-chip (NoC) communication frameworks onto a single chip...
Jason Cong, Karthik Gururaj, Guoling Han, Adam Kap...
ICCAD
2009
IEEE
133views Hardware» more  ICCAD 2009»
13 years 5 months ago
A parallel preconditioning strategy for efficient transistor-level circuit simulation
A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
Heidi Thornquist, Eric R. Keiter, Robert J. Hoekst...