579 search results - page 7 / 116 » Efficient methods for embedded system design space explorati... |
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
In this work, we provide a technique for efficiently exploring the configuration space of a parameterized system-on-a-chip (SOC) architecture to find all Pareto-optimal configurat...
SIES
2007
IEEE
14 years 1 months ago
2007
IEEE
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
CODES
2003
IEEE
14 years 12 days ago
2003
IEEE
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
DATE
2010
IEEE
14 years 6 days ago
2010
IEEE
—This paper presents a methodology to evaluate and optimize the robustness of an embedded system in terms of invariability in case of design revisions. Early decisions in embedde...
GLVLSI
2003
IEEE
14 years 12 days ago
2003
IEEE
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...