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VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
14 years 10 months ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu
ICCAD
1999
IEEE
125views Hardware» more  ICCAD 1999»
14 years 2 months ago
Direct synthesis of timed asynchronous circuits
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
Sung Tae Jung, Chris J. Myers
ICCAD
2007
IEEE
234views Hardware» more  ICCAD 2007»
14 years 1 months ago
Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors
Abstract: Polynomial computations over fixed-size bitvectors are found in many practical datapath designs. For efficient RTL synthesis, it is important to identify good decompositi...
Sivaram Gopalakrishnan, Priyank Kalla, M. Brandon ...
GECCO
2006
Springer
190views Optimization» more  GECCO 2006»
14 years 1 months ago
Design synthesis of microelectromechanical systems using genetic algorithms with component-based genotype representation
An automated design synthesis system based on a multi-objective genetic algorithm (MOGA) has been developed for the optimization of surface-micromachined MEMS devices. A hierarchi...
Ying Zhang, Raffi R. Kamalian, Alice M. Agogino, C...
ASPDAC
2008
ACM
169views Hardware» more  ASPDAC 2008»
14 years 2 days ago
Buffered clock tree synthesis for 3D ICs under thermal variations
In this paper, we study the buffered clock tree synthesis problem under thermal variations for 3D IC technology. Our major contribution is the Balanced Skew Theorem, which provides...
Jacob R. Minz, Xin Zhao, Sung Kyu Lim