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VLSID
2003
IEEE
134views VLSI» more  VLSID 2003»
14 years 10 months ago
A Framework for Energy and Transient Power Reduction during Behavioral Synthesis
Abstract-- In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability ...
Saraju P. Mohanty, N. Ranganathan
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 10 months ago
Prioritized Prime Implicant Patterns Puzzle for Novel Logic Synthesis and Optimization
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...
Kuo-Hsing Cheng, Shun-Wen Cheng
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
14 years 2 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
ISSS
1998
IEEE
124views Hardware» more  ISSS 1998»
14 years 2 months ago
Data-Path Synthesis of VLIW Video Signal Processors
This paper describes a methodology for synthesizing the data-path of a Very Long Instruction Word (VLIW) based Video Signal Processor (VSP). Offering both performance and programm...
Zhao Wu, Wayne Wolf
EURODAC
1994
IEEE
129views VHDL» more  EURODAC 1994»
14 years 2 months ago
A general state graph transformation framework for asynchronous synthesis
Abstract -- A general framework for synthesis of asynchronous control circuits at the state graph level is proposed. The framework can consider both concurrency reduction as well a...
Bill Lin, Chantal Ykman-Couvreur, Peter Vanbekberg...