This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that i...
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...
This paper describes an efficient implementation of an effective sequential synthesis operation that uses induction to detect and merge sequentially-equivalent nodes. State-encodi...
Alan Mishchenko, Michael L. Case, Robert K. Brayto...
We consider a resource synthesis technique for realtime systems where the energy budget is limited and the performance of the system depends on how resources and energy are used. ...
In this paper, we propose a novel synthesis technique for BTFs. A BTF (bidirectional texture function) is a 6D function which can represent appearances of a texture under arbitrar...
Hiroshi Kawasaki, Kyoung-Dae Seo, Yutaka Ohsawa, R...