Extending 2-D planar topologies in integrated circuits (ICs) to a 3-D implementation has the obvious benefits of reducing the overall footprint and average interconnection length,...
This paper describes a new force directed global placement algorithm that exploits and extends techniques from two leading placers, Force-directed [12] [26] and Mongrel [22]. It c...
— Since rapid progress has been made in device improvement and integration of small carbon nanotube fieldeffect transistors (CNFETs) circuits, the time has come for developing c...
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Timing-driven placement is a critical step in nanometerscale physical synthesis. To improve design timing on a global scale, net-weight based global timing-driven placement is a c...
Natarajan Viswanathan, Gi-Joon Nam, Jarrod A. Roy,...