A low overhead DFT technique, called clock-grouping, for delay testing of sequential synchronous circuits is presented. The proposed technique increases robust path delay fault co...
Abstract. The contents of the case knowledge container is critical to the performance of case-based classification systems. However the knowledge engineer is given little support i...
Address re-mapping techniques in so-called active memory systems have been shown to dramatically increase the performance of applications with poor cache and/or communication beha...
Dhiraj D. Kalamkar, Mainak Chaudhuri, Mark Heinric...
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
A 3D biped with knees and a hip is naturally modeled as a nontrivial hybrid system; impacts occur when the knee strikes and when the foot impacts the ground causing a switch in the...