329 search results - page 7 / 66 » Elliptic Control by Penalty Techniques with Control Reductio... |
ICCD
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
CDC
2009
IEEE
14 years 6 days ago
2009
IEEE
— In general, existing model reduction techniques for stable nonlinear systems lack a guarantee on stability of the reduced-order model, as well as an error bound. In this paper,...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
Many techniques have been proposed in the past for the protection of VLSI design IPs (intellectual property). CAD tools and algorithms are intensively used in all phases of modern...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
The quality of synthesis results for most high level synthesis approaches is strongly a ected by the choice of control ow through conditions and loops in the input description. In...