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» Embedded Compilation for Multimedia Applications
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CF
2009
ACM
14 years 4 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
RTAS
1997
IEEE
14 years 2 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
DAC
2006
ACM
14 years 3 months ago
Hierarchical power distribution and power management scheme for a single chip mobile processor
A hierarchical power distribution methodology that enables more than dozen power domains in a chip and a power management scheme using 20 power domains are described. This method ...
Toshihiro Hattori, Takahiro Irita, Masayuki Ito, E...
CGO
2008
IEEE
14 years 4 months ago
Modulo scheduling for highly customized datapaths to increase hardware reusability
In the embedded domain, custom hardware in the form of ASICs is often used to implement critical parts of applications when performance and energy efficiency goals cannot be met ...
Kevin Fan, Hyunchul Park, Manjunath Kudlur, Scott ...
CODES
2007
IEEE
14 years 4 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid