1742 search results - page 178 / 349 » Embedded MPLS Architecture |
ICCAD
2001
IEEE
14 years 6 months ago
2001
IEEE
In this work, we provide a technique for efficiently exploring the configuration space of a parameterized system-on-a-chip (SOC) architecture to find all Pareto-optimal configurat...
ISCAS
2005
IEEE
14 years 2 months ago
2005
IEEE
—A high-throughput hardware architecture and FPGA implementation of the 64-bit NESSIE proposal, MISTY1 block cipher, is presented in this paper. This architecture, in contrast to...
WMPI
2004
ACM
14 years 2 months ago
2004
ACM
In order to meet the requirements concerning both performance and energy consumption in embedded systems, new memory architectures are being introduced. Beside the well-known use o...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper presents the SPIN micro-network that is a generic, scalable interconnect architecture for system on chip. The SPIN architecture relies on packet switching and point-to-...
IWPC
2002
IEEE
14 years 2 months ago
2002
IEEE
Maintenance and evolution of complex software systems (such as large telecom embedded devices) involve activities such as reverse engineering (RE) and software visualization. Alth...