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» Embedded system synthesis under memory constraints
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ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan
CISIS
2009
IEEE
14 years 2 months ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
DATE
2007
IEEE
108views Hardware» more  DATE 2007»
14 years 1 months ago
Evaluation of design for reliability techniques in embedded flash memories
Non-volatile Flash memories are becoming more and more popular in Systems-on-Chip (SoC). Embedded Flash (eFlash) memories are based on the well-known floatinggate transistor conce...
Benoît Godard, Jean Michel Daga, Lionel Torr...
VLSID
2009
IEEE
119views VLSI» more  VLSID 2009»
14 years 8 months ago
Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems
Abstract-- Single-ended static random access memory (SESRAM) is well known for their tremendous potential of low active power and leakage dissipations. In this paper, we present a ...
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhi...
ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
13 years 11 months ago
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak