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» Encoding Algorithms for Logic Synthesis
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DAC
2006
ACM
16 years 3 months ago
Synthesis of high-performance packet processing pipelines
Packet editing is a fundamental building block of data communication systems such as switches and routers. Circuits that implement this function are critical and define the featur...
Cristian Soviani, Ilija Hadzic, Stephen A. Edwards
HYBRID
2000
Springer
15 years 6 months ago
Decidable Controller Synthesis for Classes of Linear Systems
A problem of great interest in the control of hybrid systems is the design of least restrictive controllers for reachability specifications. Controller design typically uses game t...
Omid Shakernia, Shankar Sastry, George J. Pappas
131
Voted
ICCAD
1994
IEEE
127views Hardware» more  ICCAD 1994»
15 years 6 months ago
Synthesis of concurrent system interface modules with automatic protocol conversion generation
-- We describe a new high-level compiler called Integral fordesigning system interface modules. The inputis a high-levelconcurrent algorithmic specification that can model complex ...
Bill Lin, Steven Vercauteren
ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
15 years 7 months ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
CIIA
2009
15 years 3 months ago
Physical Synthesis for CPLD Architectures
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
Sid-Ahmed Senouci