395 search results - page 47 / 79 » Encoding Algorithms for Logic Synthesis |
102
Voted
ICCAD
2004
IEEE
15 years 11 months ago
2004
IEEE
— This paper presents two contributions. The first is an incremental placement algorithm for placement-aware logic synthesis along with a proof of optimality. The algorithm can ...
118
Voted
PDP
2003
IEEE
15 years 7 months ago
2003
IEEE
As general-purpose parallel computers are increasingly being used to speed up different VLSI applications, the development of parallel algorithms for circuit testing, logic minimi...
113
Voted
ISCAS
2003
IEEE
15 years 7 months ago
2003
IEEE
Ordered Binary Decision Diagrams (BDDs) are frequently used in logic synthesis. In this paper a new exact BDD minimization algorithm is presented, which is based on state space se...
110
Voted
SP
2000
IEEE
15 years 6 months ago
2000
IEEE
Tradeoffs are an important part of engineering security. Protocol security is important. So are efficiency and cost. This paper provides an early framework for handling such aspec...
114
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DSD
2006
IEEE
15 years 4 months ago
2006
IEEE
The paper deals with synthesis technique for designing circuits with cascade errors detection. The proposed technique is based on partitioning a scheme into a number of cascades f...