395 search results - page 49 / 79 » Encoding Algorithms for Logic Synthesis |
132
Voted
MEMOCODE
2007
IEEE
15 years 8 months ago
2007
IEEE
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
112
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DAC
2003
ACM
16 years 3 months ago
2003
ACM
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
126
Voted
ASPDAC
2004
ACM
15 years 7 months ago
2004
ACM
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...
111
Voted
CODES
2005
IEEE
15 years 8 months ago
2005
IEEE
In this paper, we show a novel approach to accelerate loops by tightly coupling a coprocessor to an ASIP. Latency hiding is used to exploit the parallelism available in this archi...
124
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ATVA
2006
Springer
15 years 6 months ago
2006
Springer
Ping-pong protocols with recursive definitions of agents, but without any active intruder, are a Turing powerful model. We show that under the environment sensitive semantics (i.e....