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» Encoding Algorithms for Logic Synthesis
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DAC
2004
ACM
14 years 10 months ago
Post-layout logic optimization of domino circuits
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
Aiqun Cao, Cheng-Kok Koh
DATE
1997
IEEE
99views Hardware» more  DATE 1997»
14 years 2 months ago
Fast controllers for data dominated applications
A target structure for implementing fast edge-triggered control units is presented. In many cases, the proposed controller is faster than a one-hot encoded structure as its correc...
Andre Hertwig, Hans-Joachim Wunderlich
TACAS
2010
Springer
151views Algorithms» more  TACAS 2010»
13 years 7 months ago
A Polymorphic Intermediate Verification Language: Design and Logical Encoding
Abstract. Intermediate languages are a paradigm to separate concerns in software verification systems when bridging the gap between programming languages and the logics understood ...
K. Rustan M. Leino, Philipp Rümmer
DAC
2004
ACM
14 years 3 months ago
A new state assignment technique for testing and low power
In order to improve the testabilities and power consumption, a new state assignment technique based on m-block partition is introduced in this paper. The length and number of feed...
Sungju Park, Sangwook Cho, Seiyang Yang, Maciej J....
ISCAS
2002
IEEE
82views Hardware» more  ISCAS 2002»
14 years 2 months ago
Logic synthesis for PLA with 2-input logic elements
In this paper, we present a new logic synthesis method for PLA with 2-input logic elements. A PLA with 2-input logic elements can achieve low-power dissipation and high-speed oper...
Hiroaki Yoshida, Hiroaki Yamaoka, Makoto Ikeda, Ku...