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WCE
2007
13 years 10 months ago
Power Flow Modelling of a Self-excited Induction Generator
—This paper presents power flow models of a self-excited induction generator. These models are used for steady-state power flow calculation in electric power systems in which a g...
Thanatchai Kulworawanichpong, P. Sangsarawut
ICIP
2005
IEEE
14 years 10 months ago
Multiple active contour models based on the EM algorithm
This paper describes an algorithm for the extraction of multiple regions using multiple active contour models (ACMs). The algorithm organizes edge points into strokes and assigns ...
Margarida Silveira, Jorge S. Marques
FPGA
2003
ACM
167views FPGA» more  FPGA 2003»
14 years 2 months ago
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
ISLPED
2005
ACM
123views Hardware» more  ISLPED 2005»
14 years 2 months ago
Coordinated, distributed, formal energy management of chip multiprocessors
Designers are moving toward chip-multiprocessors (CMPs) to leverage application parallelism for higher performance while keeping design complexity under control. However, to date,...
Philo Juang, Qiang Wu, Li-Shiuan Peh, Margaret Mar...
ISCAS
2006
IEEE
93views Hardware» more  ISCAS 2006»
14 years 2 months ago
A low-power clock frequency multiplier
A low-power output feedback controlled frequency synthesizer. Our proposed circuit can be used for low-power multiplier is proposed for Delay Locked Loop (DLL) based application an...
Md. Ibrahim Faisal, Magdy A. Bayoumi, Peiyi Zhao