122 search results - page 17 / 25 » Energy reduction in multiprocessor systems using transaction... |
ISCA
1994
IEEE
14 years 26 days ago
1994
IEEE
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...
DATE
2004
IEEE
14 years 15 days ago
2004
IEEE
This paper presents a new and simple prefetching mechanism to improve the memory performance of multimedia applications. This method adapts the memory access mechanism to the acce...
ISCA
2010
IEEE
14 years 1 months ago
2010
IEEE
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
LCTRTS
2010
Springer
13 years 6 months ago
2010
Springer
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...