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HPCA
1997
IEEE
13 years 12 months ago
Datapath Design for a VLIW Video Signal Processor
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S....
JSA
2006
97views more  JSA 2006»
13 years 7 months ago
Dynamic feature selection for hardware prediction
It is often possible to greatly improve the performance of a hardware system via the use of predictive (speculative) techniques. For example, the performance of out-of-order micro...
Alan Fern, Robert Givan, Babak Falsafi, T. N. Vija...
GI
2004
Springer
14 years 1 months ago
An Architecture Concept for Mobile P2P File Sharing Services
Abstract: File-sharing in mobile networks has differing demands to a P2P architecture. Resource access and mediation techniques must follow constraints given in 2.5G/3G networks. E...
Frank-Uwe Andersen, Hermann de Meer, Ivan Dedinski...
ISLPED
2003
ACM
91views Hardware» more  ISLPED 2003»
14 years 27 days ago
Reducing reorder buffer complexity through selective operand caching
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad ...
ITC
2003
IEEE
136views Hardware» more  ITC 2003»
14 years 27 days ago
Adapting JTAG for AC Interconnect Testing
The use of AC coupled interconnects to provide communication paths between devices is increasing. The existing IEEE 1149.1 boundary scan standard [1] (JTAG) has limitations that h...
Lee Whetsel