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ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
13 years 11 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin
CHI
2003
ACM
14 years 27 days ago
Comparative effectiveness of augmented reality in object assembly
Although there has been much speculation about the potential of Augmented Reality (AR), there are very few empirical studies about its effectiveness. This paper describes an exper...
Arthur Tang, Charles B. Owen, Frank Biocca, Weimin...
DAC
2009
ACM
14 years 8 months ago
Way Stealing:cache-assisted automatic instruction set extensions
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
CODES
2005
IEEE
14 years 1 months ago
Enhanced code density of embedded CISC processors with echo technology
Code density is an important issue in memory constrained systems. Some RISC processor, e.g. the THUMB extension in the ARM processor, supports aggressive code size reduction even ...
Youfeng Wu, Mauricio Breternitz Jr., Herbert H. J....
3DIM
2003
IEEE
14 years 28 days ago
Adaptive Enhancement of 3D Scenes using Hierarchical Registration of Texture-Mapped 3D models
Adaptive fusion of new information in a 3D urban scene is an important goal to achieve in computer vision, graphics, and visualization. In this work we acquire new image pairs of ...
Srikumar Ramalingam, Suresh K. Lodha