Sciweavers

710 search results - page 105 / 142
» Estimating design time for system circuits
Sort
View
DATE
2008
IEEE
126views Hardware» more  DATE 2008»
16 years 4 days ago
In-band Cross-Trigger Event Transmission for Transaction-Based Debug
Cross-trigger, the mechanism to trigger activities in one debug entity from debug events happened in another debug entity, is a very useful technique for debugging applications in...
Shan Tang, Qiang Xu
MTDT
2003
IEEE
105views Hardware» more  MTDT 2003»
15 years 11 months ago
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu L...
DATE
2010
IEEE
132views Hardware» more  DATE 2010»
15 years 10 months ago
Programmable aging sensor for automotive safety-critical applications
- Electronic systems for safety-critical automotive applications must operate for many years in harsh environments. Reliability issues are worsening with device scaling down, while...
Julio César Vázquez, Víctor H...
TVLSI
2010
15 years 10 days ago
Test Data Compression Using Efficient Bitmask and Dictionary Selection Methods
Abstract--Higher circuit densities in system-on-chip (SOC) designs have led to drastic increase in test data volume. Larger test data size demands not only higher memory requiremen...
Kanad Basu, Prabhat Mishra

Publication
351views
17 years 5 months ago
Synthesizable High Level Hardware Descriptions
Modern hardware description languages support code-generation constructs like generate/endgenerate in Verilog. These constructs are intended to describe regular or parameterized ha...
Jennifer Gillenwater, Gregory Malecha, Cherif Sala...