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» Estimating design time for system circuits
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VR
2007
IEEE
14 years 2 months ago
Variability-Aware Latency Amelioration in Distributed Environments
Application designers of collaborative distributed Virtual Environments must account for the influence of the network connection and its detrimental effects on user performance. ...
Alexey Tumanov, Robert S. Allison, Wolfgang St&uum...
WSC
1998
13 years 9 months ago
Effective Simulation Model Reuse: a case study for AMHS modeling
The application of simulation as a performance estimation tool in automated material handling system design is well documented, as is the amount of time required to build, debug, ...
Gerald T. Mackulak, Frederick P. Lawrence, Theron ...
DAC
2002
ACM
14 years 9 months ago
The next chip challenge: effective methods for viable mixed technology SoCs
The next generation of computer chips will continue the trend for more complexity than their predecessors. Many of them will contain different chip technologies and are termed SoC...
H. Bernhard Pogge
ICCD
2005
IEEE
221views Hardware» more  ICCD 2005»
14 years 5 months ago
Broadband Impedance Matching for Inductive Interconnect in VLSI Packages
Abstract— Noise induced by impedance discontinuities from VLSI packaging is one of the leading challenges facing system level designers in the next decade. The performance of IC ...
Brock J. LaMeres, Sunil P. Khatri
HICSS
2008
IEEE
108views Biometrics» more  HICSS 2008»
14 years 2 months ago
Should Online Auctions Employ Dynamic Buyout Pricing Models?
Online auctions are inherently dynamic. Online auction designs that internalize temporal changes in the economic environment are generally expected to perform better than static d...
Roumen Vragov, Di Shang, Karl Reiner Lang