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ASPLOS
2006
ACM
14 years 1 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
MOBISYS
2007
ACM
14 years 7 months ago
Triage: balancing energy and quality of service in a microserver
The ease of deployment of battery-powered and mobile systems is pushing the network edge far from powered infrastructures. A primary challenge in building untethered systems is of...
Nilanjan Banerjee, Jacob Sorber, Mark D. Corner, S...
CODES
2001
IEEE
13 years 11 months ago
Dynamic I/O power management for hard real-time systems
Power consumption is an important design parameter for embedded and portable systems. Software-controlled (or dynamic) power management (DPM) has recently emerged as an attractive...
Vishnu Swaminathan, Krishnendu Chakrabarty, S. Sit...
TCAD
2002
158views more  TCAD 2002»
13 years 7 months ago
Static power modeling of 32-bit microprocessors
The paper presents a novel strategy aimed at modelling instruction energy consumption of 32-bits microprocessors. Differently from former approaches, the proposed instruction-level...
Carlo Brandolese, Fabio Salice, William Fornaciari...
DAC
2002
ACM
14 years 8 months ago
Exploiting shared scratch pad memory space in embedded multiprocessor systems
In this paper, we present a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we p...
Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhar...