72 search results - page 4 / 15 » Estimation and optimization of reliability of noisy digital ... |
VLSID
2007
IEEE
14 years 8 months ago
2007
IEEE
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...
ISQED
2008
IEEE
14 years 2 months ago
2008
IEEE
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
GECCO
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a highly efficient, fully parallelized implementation of the compact genetic algorithm (cGA) to solve very large scale problems with millions to billions of va...
ISQED
2010
IEEE
13 years 9 months ago
2010
IEEE
Circuit design under process variation can be formulated mathematically as a robust optimization problem with a yield constraint. Existing methods force designers to either resort...